Design Verification Engineer

Santa Clara, CA 95054

Posted: 03/22/23 Employment Type: 12 Months Industry: Other Job Number: AMDJP00002930

Job Description

Senior Infinity Fabric Verification Engineer

The Role:
The Infinity Fabric transport layer verification team is looking for a senior pre-silicon verification engineer to help verify our configurable switches and die-to-die interconnect. Infinity Fabric is part of every new Client product being developed across Client, Server, Graphics, and Semi-Custom markets. Our growing team is in need of additional senior engineering experience to help us enhance our configurable testbench and to mentor junior engineers.

The Person:
The preferred candidate will have proven experience verifying complex design blocks at the IP or SoC level using SystemVerilog/UVM or related technologies. He or she should be comfortable creating and executing on testplans in collaboration with design and verification colleagues in a metric-focused environment.

Key Responsibilities:

• Develop and enhance SystemVerilog / UVM-based testbenches to verify new features for client, server, graphics, and semi-custom interconnects.
• Interact with architects, RTL designers, performance engineers, and post-silicon validation engineers to develop deep expertise in the Infinity Fabric architecture.
• Mentor junior engineers.
Preferred Experience:

• Architected and developed complex verification environments and infrastructure, including scripting using Perl, Ruby, Make, or similar.
• Exposure to RTL design, software development, formal verification, or other related domains.
• 10-15 years industry experience is preferred.

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