Work Location: We are flexible based on the candidate's, allowing for options between Folsom, CA, and Boxborough, MA.
TOP MUST HAVE SKILLS:
- Circuit level simulations for high-speed I/O circuits
- Signal integrity (SI) & power integrity (PI)
- Bump, RDL, package and power/grid layout creation
Key Responsibilities:
o Design and develop high-speed I/O circuits for advanced process nodes.
o Perform system and circuit-level simulations to evaluate and optimize I/O performance.
o Collaborate with Signal Integrity and Power Integrity (SIPI) teams to analyze, model, and optimize signal and power integrity for high-speed designs.
o Work closely with Package design team and Analog design team to analyze the interposer design.
o Conduct system-level modeling of IO interfaces for performance assessment.
Qualifications:
o BSEE or MSEE or similar design equivalent experience.
o 5+ years’ experience in physical design or automated layout creation
o Proven experience in high-speed analog/mixed-signal IO circuit design and system modeling with s-parameters.
o Strong understanding of DDR and LPDDR interface architectures.
o Proficiency in circuit simulation tools such as Spectre and HSPICE, HFSS
o Solid background in signal integrity (SI), power integrity (PI).
o Familiarity with MATLAB or Python for modeling and automation tasks.
o EDA scripts skills in tcl, perl and python
