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Validation Engineer - Junior (US)

Santa Clara, CA 95054

Posted: 03/23/25 Employment Type: 6 months contract Industry: Other Job Number: AMDJP00003938

Job Description

JOB DUTIES: In this role, this engineer will be part of a highly technical team that debugs customer issues on silicon. Executes functional test plans using hardware & software validation tools, oscilloscopes, & logic analyzers. Duties will include but not be limited to:
- Organizing and running regular engineering meetings.
- Ability to perform debug of failing tests.
- Delivering regular status updates.
- Analysis of test results and determining next steps for validation / experimentation.
- Operate high speed oscilloscopes and related equipment to measure and test high speed ASIC I/O.
- Develop and analyze I/O characterization test plans for upcoming products.
- Execute and or supervise the execution of I/O characterization test plans.
- Developing and debugging automation for benchtop test flows.
- Develop and analyze scripts in Python or similar language to facilitate and automate test sequences.

EXPERIENCE AND EDUCATION:
- Bachelors in Electrical Engineering or Computer Engineering required with 1-3 years of related experience; or Masters plus at least 1 years directly related experience (an advanced degree will be considered a plus)
- Familiarity with Client ACAP SoC, and using Vivado tool to develop and verify the designs
- Requires experience and demonstrated technical expertise in the development & execution of platform level electrical & functional test plans
- Platform level electrical characterization experience with processor I/O interfaces is considered, preferred
- Requires good written and oral communication skills
- Demonstrate the ability to communicate with a variety of engineering disciplines and management

Essential:
- Using Vivado to develop and verify the designs
- Python Development for automation infrastructure
- Post Silicon Validation

Nice-to-have:
- Demonstrated experience with or knowledge of using oscilloscopes, logic analyzers, and other lab equipment
- Experience and demonstrated technical expertise in the debug of DDR memories and I/O interfaces
- Reading schematics and layout documentation

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